1. Technical Field
Embodiments of the present invention relate to power converters, and, in particular, three-level power converters.
2. Related Art
A three-level power converter is employed in a power converter that converts direct current power to alternating current power or alternating current power to direct current power. A three-level power converter can reduce alternating current voltage waveform distortion, enabling a reduction of unwanted sound and noise.
FIG. 9 shows a circuit of a three-level power converter disclosed in Japanese Patent Application No. 2002-247862. In FIG. 9, reference numeral 1 is a first direct current power supply, 2 is a second direct current power supply, M10 and M20 are semiconductor devices, and Q1 to Q4 are first to fourth semiconductor switching elements.
The first direct current power supply 1 and the second direct current power supply 2 are connected in series, configuring a direct current voltage supply series circuit. One end of the direct current voltage supply series circuit is a first terminal P, while the other end is a second terminal N. A connection point of the first direct current power supply 1 and the second direct current power supply 2 is a third terminal C. The voltages of the first direct current power supply 1 and the second direct current power supply 2 are normally the same voltage. When taking each voltage to be E/2(V), the voltage across the direct current voltage supply series circuit (the voltage between the first terminal P and the second terminal N) is E(V).
The semiconductor device M10 is configured of a series circuit of the semiconductor switching elements Q1 and Q2 (a first series circuit). The two ends of the series circuit of the semiconductor switching elements Q1 and Q2 are connected each to the first terminal P and the second terminal N. Also, a connection point of the semiconductor switching elements Q1 and Q2 is connected to a fourth terminal AC.
Meanwhile, the semiconductor device M20 is configured of a series circuit of the semiconductor switching elements Q3 and Q4 (a second series circuit). The two ends of the series circuit of the semiconductor switching elements Q3 and Q4 are connected each to the third terminal C and the connection point of the semiconductor switching elements Q1 and Q2.
The first to fourth semiconductor switching elements Q1 to Q4 are, for example, insulated gate bipolar transistors (IGBTs) with self-commutation capability, or the like, and a diode is connected in anti-parallel to either end thereof.
In the circuit of FIG. 9, when the IGBT of the semiconductor switching element Q1 is turned on and the IGBTs of the semiconductor switching elements Q2 to Q4 are turned off, the voltage E(V) is output to the fourth terminal AC. When the IGBTs of the semiconductor switching elements Q1 and Q2 are turned off and either of the IGBTs of the semiconductor switching elements Q3 and Q4 is turned on, the voltage E/2(V) is output to the fourth terminal AC. When the IGBT of the semiconductor switching element Q2 is turned on and the IGBTs of the semiconductor switching elements Q1, Q3, and Q4 are turned off, a voltage of 0(V) is output to the fourth terminal AC.
Because of this, the power converter shown in FIG. 9 can generate alternating current voltage formed from three levels of potential, 0(V), E/2(V), and E(V).
In the power converter using the heretofore known technology described above, the first series circuit wherein the semiconductor switching elements Q1 and Q2 are connected in series is configured of the semiconductor device M10. Also, the second series circuit wherein the semiconductor switching elements Q3 and Q4 are connected in series is configured of the semiconductor device M20. Then, the switching loss occurring in the semiconductor switching elements Q1 and Q2 is roughly twice the switching loss occurring in the semiconductor switching elements Q3 and Q4. Because of this, in general, the size of the loss occurring in the semiconductor device M10 is approximately 1.5 times larger in comparison with the size of the loss occurring in the semiconductor device M20.
Consequently, two kinds of cooling fins with differing cooling capabilities are needed in order to optimally cool the semiconductor device M10 and the semiconductor device M20. As a result of this, twice the number of man-hours are needed for the design, fabrication, cooling capability evaluation, and the like, of the cooling fins. Meanwhile, when cooling the semiconductor devices M10 and M20 with cooling fins having the same cooling capability, the cooling capability of the cooling fins is fixed based on the loss characteristics of the semiconductor device M10, in which the greater loss occurs. Because of this, when considering the cooling of the semiconductor device M20, the cooling capability of the cooling fin is too high. In this case, there is a hindrance to a reduction in size and a reduction in cost of the power converter. Thus, there is a need in the art for an improved power converters.